Modern semiconductor based integrated circuits (ICs) are incredibly complex and contain millions of circuit devices, such as transistors, and millions of interconnections between the circuit devices. Designing such complex circuits cannot be accomplished manually, and circuit designers use computer based Electronic Design Automation (EDA) tools for schematics, layouts, simulation, and verification of the complex circuits. The EDA tools provide various graphical user interfaces (GUIs) and text based interfaces to allow circuit designer to modify a schematic or a layout based design to generate a functioning and optimized circuit schematic or layout.
EDA tools typically use instances of programmable or parameterized or parameterizable cells (shortened as pcell for a singular instance or pcells for plural instances) to form an electronic circuit design. A pcell includes parameters to represent circuit components such as a transistor. Furthermore, pcells can represent other circuit devices such as logic gates, memory devices, and/or transmission lines. A circuit designer may therefore may instantiate various pcells and connect the instantiated pcells to generate a design of an IC or a part thereof.
As mentioned above, a circuit designer may use an EDA tool to modify an IC design. For example, in the context of pcells or any other type of cell based design, the circuit designer may have to move or rotate the cells. Furthermore, the pcells (or any other type of cells) may be arranged hierarchically, and the children pcells may have to be rotated with the parent pcells. However, conventional EDA tools do not provide instance rotation functionality. The conventional EDA tools are confined geometrical rotations. For example, in a hierarchical design with multiple levels of cells and geometrical shapes at the leaf level; a conventional EDA tool has to completely flatten the design to reach the geometrical shapes. Once the conventional EDA tool reaches the leaf level by flattening the design instance, the conventional EDA tool may merely rotate the geometrical shapes. However, the conventional EDA tool does not have a notion of rotating the pcell instance itself. Furthermore, the conventional method of completely flattening the design due the lack the instance rotation functionality presents a large computational and memory overload for the conventional EDA tools.